The present invention relates to semiconductor integrated circuits and their manufacture, and more specifically to structures and methods of making a polysilicon resistor or electrical fuse of an integrated circuit.
The technology trend has been to reduce the size of semiconductor devices and increase the speed of operation. As the required speed of operation increases, high dielectric constant (high-k) materials are being considered for use as the gate dielectric and metal gates are being considered for devices. These materials can help achieve goals for speed of operation in semiconductor integrated circuits (ICs) or “chips” and higher level components and systems in which the chips can be used.
Polysilicon resistors can be manufactured on chips in small size and with acceptable resistance. However, in logic chips such as complementary metal-oxide-semiconductor (CMOS) chips, the fabrication of polysilicon resistors with transistors having high-k gate dielectric and metal gate materials has created certain design challenges. To reduce manufacturing steps and costs, polysilicon resistors and polysilicon gates of transistors on the chip have traditionally been formed simultaneously using many processing steps in common. However, when a polysilicon resistor is fabricated in a structure which includes a metal gate layer, the traditional methods can raise concerns due to the presence of a conducting metal layer under the polysilicon layer.
Similar concerns are associated with the manufacturing of electrical fuses (e-fuses). E-fuses have been used in chips in recent years because they can permit a chip to be reprogrammed even after the chip has been manufactured, packaged, and possibly installed in a higher level assembly or system. Unfortunately, like polysilicon resistors, the fabrication of e-fuses in chips which have metal gate layers and high-k materials can add complexity or manufacturing costs or steps to the fabrication process.
Consequently, there is a need for improved structures and methods of fabricating polysilicon resistors and e-fuses in chips in conjunction with the simultaneous fabrication of transistors having high-K gate dielectrics and metal gates.